Dead-zone free Memristor-based Phase-Frequency Detector for Duty-Cycled Transceivers

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Abstract In this paper, a novel and simple Phase-Frequency Detection (PFD) technique based on two memristor elements is proposed and demonstrated. This PFD technique can generate a DC signal that represents the difference in phase or frequency between two sinusoidal inputs. Therefore, the proposed technique eliminates the need for the Low Pass Filter (LPF) block in the Phase-Locked Loop (PLL) structure, which reduces the dissipated power and the area of the overall PLL system, hence results in more efficiency when used in the body implants. Moreover, this Phase detector can be combined with a memristor-based Voltage Controlled Oscillator (VCO) for building, to the best of our knowledge, the first reported memristor-based PLL system. The simulations for the proposed PFD circuit are performed using a realistic nonlinear dopant drift memristor model to confirm the validity of the predicted results, while incorporating all known non-idealities of factual realized memristor devices. The simulation results reveal the zero dead-zone feature. Furthermore, the proposed circuit fits well in Normally-Off and duty-cycled transceiver systems designed for extreme low power consumption. This stems from the fact of its switched nature, besides fast start-up.

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